
4 Test Head Filling and DUT Board Considerations Test System Configuration
92 System Reference, January 2001
According to drawings
D-E6980-96540-1S24D
(512 pins) and
D-E6980-96550-1S24D
(1024 pins)
3 The pogo pin assignment for the TIAs is illustrated in
Table 13.
Table 13 TIA Pogo Pad Assignment
As there are always two TIAs connected to one frontend,
Trigger 1 and Trigger 2. You will need the triggers if you
want to use an external arm for your time interval analysis.
The ground of each input and loop back pin within the TIAs
is seperated from other inputs to reduce noise to AWG and
Digitizer. Therefore, there are 7 seperate grounds.
Pad # GND Pads TIA
1 DGND Trigger-2(Arm-2)
2 DGND Trigger-1(Arm-1)
3 GND-7 Loopback-7
4 GND-7 Input-7
5 GND-6 Loopback-6
6 GND-6 Input-6
7 GND-5 Loopback-5
8 GND-5 Input-5
9 GND-4 Loopback-4
10 GND-4 Input-4
11 GND-3 Loopback-3
12 GND-3 Input-3
13 GND-2 Loopback-2
14 GND-2 Input-2
15 GND-1 Loopback-1
16 GND-1 Input-1
17 tbd Reserved
Kommentare zu diesen Handbüchern